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Intel Power Modeling Engineer in Helena, Montana

Job Description

The mission of Intel’s Programmable Solutions Group (PSG) is to drive the future for Field-Programmable Gate Array (FPGAs) and Structured Application Specific Integrated Circuit (ASICs) technology/solutions around the globe. With the Performance & Power Team, you'll be surrounded by some of the brightest minds in the world as we work across the Programmable Solutions Engineering team to extend our Performance per Watt leadership across all product families and variants.

As a key member of PSG (Programmable Solution Group) Power team, you will be responsible for full chip power analysis and optimization. Responsibilities include power analysis, power model generation and optimization. In this role, you will collaborate closely with cross-functional teams (Design, Planning, Package, Platform) and commit product power to meet business goals. You will also develop flows to enable efficient and accurate power analysis, including workload- and profile-dependent scenarios. If you have a passion for power modeling and optimization, we would love to talk with you.

Qualifications

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education:

  • BS/MS in Electrical Engineering, Computer Science, or equivalent, with a minimum of 3 years of experience in digital design

Minimum Qualifications:

3+ years of experience in the following:

  • Understanding of power model generation and low power techniques

  • Power analysis tools such as Primetime-PX, Redhawk, Power Artist and Spice

  • Flow or tool development using Python/Perl/Tcl or C/C+ Preferred Qualifications:

  • MS in Electrical Engineering or Computer Engineering with 5+ years of experience

  • 5+ years of experience in power analysis and model generation

  • Have direct experience on following protocols or domains: DDR, PCIe, Ethernet, HBM

  • FPGA Experience with FPGA and related EDA tools

Inside this Business Group

The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Covid Statement

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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